Volume 29 Issue 12
Dec.  2014
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CHEN Jian, LIU Dong-dong, ZHANG Tian-hong. Design of open DEEC based on TTP/C bus and verification of PIL simulation[J]. Journal of Aerospace Power, 2014, 29(12): 2936-2941. doi: 10.13224/j.cnki.jasp.2014.12.021
Citation: CHEN Jian, LIU Dong-dong, ZHANG Tian-hong. Design of open DEEC based on TTP/C bus and verification of PIL simulation[J]. Journal of Aerospace Power, 2014, 29(12): 2936-2941. doi: 10.13224/j.cnki.jasp.2014.12.021

Design of open DEEC based on TTP/C bus and verification of PIL simulation

doi: 10.13224/j.cnki.jasp.2014.12.021
  • Received Date: 2013-07-21
  • Publish Date: 2014-12-28
  • With the self-development TTP/C (time trigger protocol/automotive class C) bus controller, a redundant architecture of open DEEC (digital electronic engine controller) was proposed, which was divided into three kinds of intelligent nodes: input, core calculation and output, and the task scheduling for each intelligent node was planned. Hardware platform of intelligent node was designed based on DSP (digital signal processor) and FPGA (field-programmable gate array), and the software was designed for each intelligent node. Finally, a PIL (process in the loop) simulation test platform for open DEEC was constructed.With an engine model as the controlled object, the state regulation experiments and bus fault injection experiments were conducted.The experiment results show that the open DEEC architecture is feasible and has a good reconstruction ability.

     

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